Resistive Interconnection Localization

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn , Issue , 2001, Pages 43-50

  Cole Jr , Edward I ^a   Tangyunyong, Paiboon ^a   Hawkins, Charles F ^b   Bruce, Michael R ^c   Bruce, Victoria J ^c   Ring, Rosalinda M ^c   Chong, Wan Loong ^c  

^a SANDIA NATIONAL LABORATORIES   (United States)

^b UNIVERSITY OF NEW MEXICO   (United States)

^c ADVANCED MICRO DEVICES   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FUNCTIONAL TESTING; RESISTIVE INTERCONNECTION LOCALIZATION (RIL); SCANNING LASER MICROSCOPE ANALYSIS;

ADHESION; DEFECTS; ELECTROMIGRATION; ELECTRONIC EQUIPMENT TESTING; FAILURE ANALYSIS; INTERCONNECTION NETWORKS; LASER BEAMS; PHOTOCURRENTS; RELIABILITY; THERMAL EXPANSION; THERMAL GRADIENTS; WAVEFORM ANALYSIS;

INTEGRATED CIRCUITS;

EID: 1542270753     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

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2. J.A. Kash, J.C. Tsang, D.R. Knebel, and D.P. Vallet, "Non-Invasive Backside Failure Analysis of ICs by Time-Dependent Light Emission: PICA," Int. Symp. Test. & Failure Analysis (ISTFA), pp. 482-488, Nov. 1998.
3. M. Paniccia, T. Eiles, V.R.M. Rao, and W.M. Yee, "Novel Optical Probing Technique for Flip Chip Packaged Microprocessors," Int. Test Conf. (ITC), pp. 740-747, Oct. 1998.
4. E.I. Cole Jr., P. Tangyunyong, D.A. Benson, and D.L. Barton, "TIVA and SEI Developments for Enhanced Front and Backside Interconnection Failure Analysis," European Symp. On Reliability of Electron Devices (ESREF), pp. 991-996, Oct. 1999.
5. K. Nikawa and S. Inoue, "New Capabilities of OBIRCH Method for Fault Localization and Defect Detection," Proc. of Sixth Asian Test Symposium, pp. 219-219, July 1997.
6. A. Campbell, E. Cole, C. Henderson and M. Taylor, "Case History: Failure Analysis of a CMOS SRAM with an Intermittent Open," Int. Symp. Test. & Failure Analysis (ISTFA), pp. 261-269, Nov. 1991.
7. K. Takagi and Y. Kohno, "Failure Analysis of Tungsten Stud Defects from the CMP Process," Int. Symp. Test & Failure Analysis (ISTFA), pp. 315-321, Nov. 2000.
8. B. Draper, Photos contributed by Bruce Draper, Sandia National Labs, March 2001.
9. K. Baker, G. Gronthoud, M. Lousberg, I. Schanstra and C. Hawkins, "Defect-Based Testing of Resistive Vias-Contacts: A Critical Evaluation," Int. Test Conf. (ITC), pp. 467-476, Oct. 1999.
10. W. Filter, Lecture #8 in University of New Mexico Lecture series on "Microelectronics Reliability 2000" video tapes of lecture set available from IEEE Press, Piscataway, NJ.
11. H. Shibata, T. Matsuno and K. Hashimoto, "Via Hole-Related Simultaneous Stress-Induced Extrusion and Void Formation in Al Interconnects," Int. Rel. Physics Symp. (IRPS), pp. 340-344, April 1993.
12. J.A. Walls, "Stress-Voiding in Tungsten-Plug Interconnect Systems Induced by High-Temperature Processing," IEEE Electron Dev. Lett., vol 16, no 10, Oct 1995.
13. C. Graas, H. Le and T. Rost, "Correlations Between Initial Via Resistance and Reliability Performance," Int. Rel. Physics Symp. (IRPS), pp. 44-48, April 1996.
14. W. Needham, C. Prunty and E.H. Yeah, "High Volume Microprocessor Test Escapes; An Analysis of Defects Our Tests are Missing," Int. Test Conf. (ITC), pp. 25-34, Oct. 1998.
15. E.I. Cole Jr., J.M. Soden, B.A. Dodd, and C.L. Henderson, "Low Electron Beam Energy CIVA Analysis of Passivated ICs," Int. Symp. Test. & Failure Analysis (ISTFA), pp. 23-32, Nov. 1994.
16. E.I. Cole Jr., J.M. Soden, J.L. Rife, D.L. Barton, and C.L. Henderson. "Novel Failure Analysis Techniques Using Photon Probing in a Scanning Optical Microscope," Int. Rel. Physics Symp. (IRPS), pp. 388-398, April 1994.