Degradation of static and dynamic behavior of CMOS inverters during constant and pulsed voltage stress

Microelectronics Reliability

Volumn 46, Issue 9-11, 2006, Pages 1669-1672

  Gerardin, S ^a   Griffoni, A ^a   Cester, A ^a   Paccagnella, A ^a   Ghidini, G ^b  

^a UNIVERSITY OF PADOVA   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DEGRADATION; ELECTRIC BREAKDOWN; GATES (TRANSISTOR); TRANSISTORS; VOLTAGE CONTROL;

CMOS INVERTERS; DYNAMIC BEHAVIOR; PMOSFET; PULSED VOLTAGE STRESS;

ELECTRIC INVERTERS;

EID: 33747777087     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2006.07.052     Document Type: Article

References (6)

1. Gerardin S., et al. Impact of Fowler-Nordheim and channel hot carrier stresses on MOSFETs with 2.2nm gate oxide. Microelectronic Engineering 80 June (2005) 178-181
2. Gerardin S., et al. MOSFET drain current reduction under Fowler-Nordheim and channel hot carrier injection before gate oxide breakdown. Material Science Semiconductor Processing 7 (2004) 175-180
3. Cester A et al. Modeling mosfet and circuit degradation through spice. Proceedings ESSDERC 2005.
4. Kaczer B., et al. Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability. IEEE-Trans Electron Devices 49 (2002)
5. Rodriguez R et al. Modeling and experimental verification of the effect of gate oxide breakdown on CMOS inverters. Proc of IEEE-IRPS 2003.
6. Cester A., et al. Stress induced leakage current under pulsed voltage stress. Solid State Electronics 46 (2002) 399-405