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Volumn 2005, Issue , 2005, Pages 27-37

Instruction based memory distance analysis and its application to optimization

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; FEEDBACK; INTEGER PROGRAMMING; OPTIMIZATION; PROGRAM PROCESSORS; STORAGE ALLOCATION (COMPUTER);

EID: 33746684270     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.2005.26     Document Type: Conference Paper
Times cited : (32)

References (25)
  • 7
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    • Apparatus to dynamically control the Out-Of-Order execution of Load-Store instructions. US, Patent 5,615,350,Filed Dec. 1995, Issued Mar.
    • J. Hessen, J. LeBlanc, and S. Ciavaglia. Apparatus to dynamically control the Out-Of-Order execution of Load-Store instructions. US, Patent 5,615,350,Filed Dec. 1995, Issued Mar. 1997.
    • (1997)
    • Hessen, J.1    LeBlanc, J.2    Ciavaglia, S.3
  • 8
    • 0032058458 scopus 로고    scopus 로고
    • Informing memory operations: Memory performance feedback mechanisms and their applications
    • M. Horowitz, M. Martonosi,T. C. Mowry, and M. D. Smith. Informing memory operations: memory performance feedback mechanisms and their applications. ACM Trans. Comput. Syst., 16(2): 170-205, 1998.
    • (1998) ACM Trans. Comput. Syst. , vol.16 , Issue.2 , pp. 170-205
    • Horowitz, M.1    Martonosi, M.2    Mowry, T.C.3    Smith, M.D.4
  • 13
    • 0003665539 scopus 로고    scopus 로고
    • Quantifying loop nest locality using SPEC'95 and the Perfect benchmarks
    • Nov.
    • K. S. McKinley and O.Temam. Quantifying loop nest locality using SPEC'95 and the Perfect benchmarks. ACM Transactions on Computer Systems, 17(4):288-336, Nov. 1999.
    • (1999) ACM Transactions on Computer Systems , vol.17 , Issue.4 , pp. 288-336
    • McKinley, K.S.1    Temam, O.2
  • 15
    • 33746703763 scopus 로고    scopus 로고
    • Cost effectivememory dependence prediction using speculation levels and color sets
    • Charlottesville, Virginia September
    • S. Onder. Cost effectivememory dependence prediction using speculation levels and color sets. In International Conference on Parallel Architectures and Compilation Techniques,pages 232-241,Charlottesville, Virginia September 2002.
    • (2002) International Conference on Parallel Architectures and Compilation Techniques , pp. 232-241
    • Onder, S.1
  • 17
    • 3042641453 scopus 로고    scopus 로고
    • Dynamic memory disambiguation in the presence of out-of-order store issuing
    • June
    • S. Onder and R. Gupta. Dynamic memory disambiguation in the presence of out-of-order store issuing. Journal of Instruction Level Parallelism, Volume 4, June 2002. (www.microarch.org/vol4).
    • (2002) Journal of Instruction Level Parallelism , vol.4
    • Onder, S.1    Gupta, R.2
  • 21
    • 33746694203 scopus 로고    scopus 로고
    • Memory reference tagging US. Patent 5,619,662, Filed Aug. 1994, Issued Apr.
    • S. Steely, D. Sager, and D. Fite. Memory reference tagging. US. Patent 5,619,662, Filed Aug. 1994, Issued Apr. 1997.
    • (1997)
    • Steely, S.1    Sager, D.2    Fite, D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.