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Volumn 1, Issue , 2005, Pages 224-229

Wideband modeling of RF/analog circuits via hierarchical multi-point model order reduction

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUITS; CIRCUIT THEORY; COMPUTER AIDED DESIGN; TIMING CIRCUITS;

EID: 33746660607     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1120811     Document Type: Conference Paper
Times cited : (7)

References (31)
  • 2
    • 1242308409 scopus 로고    scopus 로고
    • A convex programming approach for generating guaranteed passive approximations to tabulated frequency-data
    • Feb.
    • J. P. C. P. Coelho and L. M. Silveira, "A convex programming approach for generating guaranteed passive approximations to tabulated frequency-data," IEEE Trans, an Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 2, pp. 293-301, Feb. 2004.
    • (2004) IEEE Trans, An Computer-Aided Design of Integrated Circuits and Systems , vol.23 , Issue.2 , pp. 293-301
    • Coelho, J.P.C.P.1    Silveira, L.M.2
  • 4
    • 0029735239 scopus 로고    scopus 로고
    • Including higher-order moments of RC interconnections in layout-to-circuit extraction
    • P. Elias and N. van der Meijs, "Including higher-order moments of RC interconnections in layout-to-circuit extraction," in Proc. European Design and Test Conf (DATE), 1996, pp. 362-366.
    • (1996) Proc. European Design and Test Conf (DATE) , pp. 362-366
    • Elias, P.1    Van Der Meijs, N.2
  • 6
    • 0030397409 scopus 로고    scopus 로고
    • Reduced-order modeling of large linear subcircuits by means of the sypvl algorithm
    • R. W. Freund and P. Feldmann, "Reduced-order modeling of large linear subcircuits by means of the sypvl algorithm," in Proc. InL Conf. on Computer Aided Design (ICCAD), 1996, pp. 280-287.
    • (1996) Proc. InL Conf. on Computer Aided Design (ICCAD) , pp. 280-287
    • Freund, R.W.1    Feldmann, P.2
  • 7
    • 0000195442 scopus 로고    scopus 로고
    • Computer-aided design of analog and mixed-signal integrated circuits
    • Dec.
    • G. Gielen and R. Rutenbar, "Computer-aided design of analog and mixed-signal integrated circuits" Proc. of IEEE, vol. 88, no. 12, pp. 703-717, Dec. 2000
    • (2000) Proc. of IEEE , vol.88 , Issue.12 , pp. 703-717
    • Gielen, G.1    Rutenbar, R.2
  • 10
    • 0036474096 scopus 로고    scopus 로고
    • DTT: Direct truncation of the transfer function -an alternative to moment matching for tree structured interconnect
    • Feb.
    • Y. Ismail and E. G. Friedman, "DTT: direct truncation of the transfer function -an alternative to moment matching for tree structured interconnect," IEEE Trans, an Computer-Aided Design of Integrated Circuits and Systems, vol. 21, no. 2, pp. 131-144, Feb. 2003.
    • (2003) IEEE Trans, An Computer-Aided Design of Integrated Circuits and Systems , vol.21 , Issue.2 , pp. 131-144
    • Ismail, Y.1    Friedman, E.G.2
  • 14
    • 0033363574 scopus 로고    scopus 로고
    • Full-wave modeling and automatic equivalent-circuit generation of millimeter-wave planar and multilayer structures
    • June
    • T. Mangold and P. Russer, "Full-wave modeling and automatic equivalent-circuit generation of millimeter-wave planar and multilayer structures," IEEE Trans, on Microwave Theory and Techniques, vol. 47, no. 6, pp. 851-858, June 1999.
    • (1999) IEEE Trans, on Microwave Theory and Techniques , vol.47 , Issue.6 , pp. 851-858
    • Mangold, T.1    Russer, P.2
  • 15
    • 0036625314 scopus 로고    scopus 로고
    • Simulation and modeling of the effect of substrate conductivity on coupling inductance and circuit crosstalk
    • Y. Massoud and J. White, "Simulation and modeling of the effect of substrate conductivity on coupling inductance and circuit crosstalk," IEEE Trans, on Very Large Scale Integration (VLSI) Systems, 2002.
    • (2002) IEEE Trans, on Very Large Scale Integration (VLSI) Systems
    • Massoud, Y.1    White, J.2
  • 20
    • 0042635847 scopus 로고    scopus 로고
    • Realizable parasitic reduction using generalized y - Δ transformation
    • Z. Qin and C. Cheng, "Realizable parasitic reduction using generalized Y - Δ transformation," in Proc. Design Automation Conf. (DAC), 2003, pp. 220-225.
    • (2003) Proc. Design Automation Conf. (DAC) , pp. 220-225
    • Qin, Z.1    Cheng, C.2
  • 22
    • 0016035432 scopus 로고
    • Equivalent circuits models for three dimensional muldconductor systems
    • A, E. Ruetili, "Equivalent circuits models for three dimensional muldconductor systems," IEEE Trans, on Microwave Theory and Techniques, pp. 216-220, 1974.
    • (1974) IEEE Trans, on Microwave Theory and Techniques , pp. 216-220
    • Ruetili, A.E.1
  • 25
  • 28
  • 29
    • 0003119486 scopus 로고    scopus 로고
    • Hierarchical symboHc analysis of large analog circuits via determinant decision diagrams
    • April
    • X.-D. Tan and C.-J. Shi, "Hierarchical symboHc analysis of large analog circuits via determinant decision diagrams," IEEE Trans, on Computer-Aided Design of Integrated Circuits and Systems, vol. 19, no. 4, pp. 401-412, April 2000.
    • (2000) IEEE Trans, on Computer-Aided Design of Integrated Circuits and Systems , vol.19 , Issue.4 , pp. 401-412
    • Tan, X.-D.1    Shi, C.-J.2
  • 31
    • 0041633619 scopus 로고    scopus 로고
    • Vector potential equivalent circuit based on PEEC inversion
    • H. Yu and L. He, "Vector potential equivalent circuit based on PEEC inversion," in Proc. Design Automation Conf. (DAC), 2003, pp. 781-723.
    • (2003) Proc. Design Automation Conf. (DAC) , pp. 781-723
    • Yu, H.1    He, L.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.