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Volumn 2005, Issue , 2005, Pages 73-78

Evolutionary discovering of the concept of the discrete state at the transistor level

Author keywords

[No Author keywords available]

Indexed keywords

D-LATCH CIRCUIT; DISCRETE STATE; EVOLUTIONARY DISCOVERING; RESET-SET CIRCUIT;

EID: 33746238129     PISSN: 15506029     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.2005.25     Document Type: Conference Paper
Times cited : (2)

References (13)
  • 3
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    • Intrinsic evolution of quasi DC solutions for transistor level analog electronic circuits using a CMOS FPTA chip
    • IEEE Computer Society
    • J. Langeheine, K. Meier, and J. Schemmel. "Intrinsic Evolution of Quasi DC Solutions for Transistor Level Analog Electronic Circuits Using a CMOS FPTA Chip". In Proc. of the 2002 NASA/DoD Conference on Evolvable Hardware, IEEE Computer Society, p. 75-84, 2002
    • (2002) Proc. of the 2002 NASA/DoD Conference on Evolvable Hardware , pp. 75-84
    • Langeheine, J.1    Meier, K.2    Schemmel, J.3
  • 4
    • 84957360162 scopus 로고    scopus 로고
    • A new research tool for intrinsic hardware evolution
    • Proc. of Evolvable Systems: From Biology to Hardware Conference, ICES 1998, Springer-Verlag
    • P. Layzell. "A New research Tool for Intrinsic Hardware Evolution". In Proc. of Evolvable Systems: From Biology to Hardware Conference, ICES 1998, LNCS 1478, Springer-Verlag, p. 47-56, 1998
    • (1998) LNCS , vol.1478 , pp. 47-56
    • Layzell, P.1
  • 5
    • 3543116021 scopus 로고    scopus 로고
    • Evolutionary algorithms and their use in the design of sequential logic circuits
    • B. Ali, A. Almaini, and T. Kalganova. "Evolutionary algorithms and their use in the design of sequential logic circuits". Genetic Programming and Evolvable Machines, Vol. 5, No. 1, p. 11-29, 2004
    • (2004) Genetic Programming and Evolvable Machines , vol.5 , Issue.1 , pp. 11-29
    • Ali, B.1    Almaini, A.2    Kalganova, T.3
  • 7
    • 84957369020 scopus 로고    scopus 로고
    • Synthesis of synchronous sequential logic circuits from parital input/output sequences
    • Proc. of Evolvable Systems: From Biology to Hardware Conference, ICES 1998, Springer-Verlag
    • Ch. Manovit, Ch. Aporntewan and P. Chongstitvatana. "Synthesis of Synchronous Sequential Logic Circuits from Parital Input/Output Sequences". In Proc. of Evolvable Systems: From Biology to Hardware Conference, ICES 1998, LNCS 1478, Springer-Verlag, p. 98-105, 1998
    • (1998) LNCS , vol.1478 , pp. 98-105
    • Manovit, Ch.1    Aporntewan, Ch.2    Chongstitvatana, P.3
  • 10
    • 84949800889 scopus 로고    scopus 로고
    • Evolutionary design of single electron systems
    • Palo Alto, CA, IEEE Computer Society
    • A. Thompson. "Evolutionary Design of Single Electron Systems". In Proc. of the 2nd NASA/DoD Workshop on Evolvable Hardware, Palo Alto, CA, IEEE Computer Society, 109-116, 2000
    • (2000) Proc. of the 2nd NASA/DoD Workshop on Evolvable Hardware , pp. 109-116
    • Thompson, A.1
  • 11
    • 48849086870 scopus 로고    scopus 로고
    • Evolution of combinational and sequential on-line self-diagnosing hardware
    • IEEE Computer Society
    • M. Garvie and A. Thompson. "Evolution of Combinational and Sequential On-line Self-Diagnosing Hardware". In Proc. of the 2003 NASA/ DoD Conference on Evolvable Hardware, IEEE Computer Society, p. 167-173, 2003
    • (2003) Proc. of the 2003 NASA/DoD Conference on Evolvable Hardware , pp. 167-173
    • Garvie, M.1    Thompson, A.2
  • 12
    • 84957017010 scopus 로고    scopus 로고
    • A genetic representation for evolutionary fault recovery in virtex FPGAs
    • Proc of the Evolvable Systems: From Biology ti Hardware Conference, ICES 2003
    • J. Lohn, G. Larchev and R. DeMara. "A Genetic Representation for Evolutionary Fault Recovery in Virtex FPGAs". In Proc of the Evolvable Systems: From Biology ti Hardware Conference, ICES 2003, LNCS 2606, p. 47-56, 2003
    • (2003) LNCS , vol.2606 , pp. 47-56
    • Lohn, J.1    Larchev, G.2    DeMara, R.3
  • 13


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.