Intrinsic evolution of quasi DC solutions for transistor level analog electronic circuits using a CMOS FPTA chip

Proceedings - NASA/DoD Conference on Evolvable Hardware, EH

Volumn 2002-January, Issue , 2002, Pages 75-84

  Langeheine, J ^a   Meier, K ^a   Schemmel, J ^a  

^a UNIVERSITY OF HEIDELBERG   (Germany)

Author keywords

CMOS analog integrated circuits; CMOS logic circuits; Electronic circuits; Genetic algorithms; Hardware; Logic gates; Logic testing; Pattern analysis; Transistors; Voltage

Indexed keywords

ANALOG INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; ELECTRIC NETWORK ANALYSIS; ELECTRIC POTENTIAL; GENETIC ALGORITHMS; HARDWARE; LOGIC GATES; NASA; NETWORKS (CIRCUITS); TRANSISTORS;

ANALOG ELECTRONIC CIRCUIT; CMOS ANALOG INTEGRATED CIRCUITS; CMOS LOGIC CIRCUITS; INTRINSIC EVOLUTION; LOGIC TESTING; PATTERN ANALYSIS; TRANSISTOR LEVEL; VOLTAGE TRANSFER;

LOGIC CIRCUITS;

EID: 84949213086     PISSN: 15506029     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EH.2002.1029869     Document Type: Conference Paper

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