GigaNetIC - A scalable embedded O-chip multiprocessor architecture for network applications

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3894 LNCS, Issue , 2006, Pages 268-282

  Niemann, Jörg Christian ^a   Puttmann, Christoph ^a   Porrmann, Mario ^a   Rückert, Ulrich ^a  

^a UNIVERSITY OF PADERBORN   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER NETWORKS; COMPUTER SYSTEM FIREWALLS; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS; SOFTWARE PROTOTYPING;

CHIP MULTIPROCESSOR ARCHITECTURE; ETHERNET-BASED DATA STREAMS; HARDWARE ACCELERATORS; NETWORK APPLICATION; PACKET PROCESSING APPLICATIONS;

MULTIPROCESSING SYSTEMS;

EID: 33745613792     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11682127_19     Document Type: Conference Paper

References (13)

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