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Volumn 2005, Issue , 2005, Pages 188-191

System-level performance analysis of embedded system using behavioral C/C++ model

Author keywords

[No Author keywords available]

Indexed keywords

C (PROGRAMMING LANGUAGE); COMPUTER SIMULATION; INTERNET; ITERATIVE METHODS; NETWORK PROTOCOLS; PROGRAM COMPILERS; SOFTWARE ENGINEERING;

EID: 33745457881     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (9)

References (14)
  • 1
    • 0036059615 scopus 로고    scopus 로고
    • Timed compiled-code simulation of embedded software for performance analysis of SOC design
    • JYong-Yeol Lee, In-Cheol Park, Timed Compiled-Code Simulation of Embedded Software for Performance Analysis of SOC Design, DAC, 2002
    • (2002) DAC
    • Lee, J.-Y.1    Park, I.-C.2
  • 3
    • 0034841395 scopus 로고    scopus 로고
    • System-level power/performance analysts for embedded systems design
    • Nandi, A., Marcuelescu, R., System-level power/performance analysts for embedded systems design, DAC, 2001
    • (2001) DAC
    • Nandi, A.1    Marcuelescu, R.2
  • 5
    • 0033319378 scopus 로고    scopus 로고
    • Fast performance analysis of bus-based system-on-chip communication architectures
    • Lahiri K., Raghunathan A., Dey S., Fast performance analysis of bus-based system-on-chip communication architectures, ICCAD, 1999.
    • (1999) ICCAD
    • Lahiri, K.1    Raghunathan, A.2    Dey, S.3
  • 6
    • 80455146516 scopus 로고    scopus 로고
    • Software timing analysis using HW/SW cosimulation and instruction set simulator
    • Jie Liu, Lajolo M., Sangiovanni-ViDcentelti A., Software timing analysis using HW/SW cosimulation and instruction set simulator, CODES, 1998.
    • (1998) CODES
    • Liu, J.1    Lajolo, M.2    Sangiovanni-ViDcentelti, A.3
  • 8
    • 4944254511 scopus 로고    scopus 로고
    • Improvement of compiled instruction set simulator by increasing flexibility and reducing compile time
    • Moo-Kyoung Chung, Chocg-Min Kyung, Improvement of compiled instruction set simulator by increasing flexibility and reducing compile time, RSP, 2004.
    • (2004) RSP
    • Chung, M.-K.1    Kyung, C.-M.2
  • 13
    • 0031356812 scopus 로고    scopus 로고
    • Embedded program timing analysis based on path clustering and architecture classification
    • Ernst, R., Ye, W., Embedded program timing analysis based on path clustering and architecture classification, ICCAD, 1997.
    • (1997) ICCAD
    • Ernst, R.1    Ye, W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.