Timed compiled-code simulation of embedded software for performance analysis of SOC design

Proceedings - Design Automation Conference

Volumn , Issue , 2002, Pages 293-298

  Lee, Jong Yeol ^a   Park, In Cheol ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Compiler; SOC; Timed functional simulation

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ESTIMATION; MICROPROCESSOR CHIPS; PROGRAM COMPILERS; TIMING CIRCUITS;

EMBEDDED SOFTWARE;

EMBEDDED SYSTEMS;

EID: 0036059615     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/513918.513994     Document Type: Conference Paper

References (14)

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4. Source-level execution time estimation of C programs
5. A case study on modeling shared memory access effects during performance analysis of HW/SW systems
6. Evaluating associativity in CPU caches