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Volumn 2005, Issue , 2005, Pages 147-156

Heuristics for profile-driven method-level speculative parallelization

Author keywords

[No Author keywords available]

Indexed keywords

RESOURCE UTILIZATION; THREAD LEVEL SPECULATION (TLS);

EID: 33745171466     PISSN: 01903918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICPP.2005.44     Document Type: Conference Paper
Times cited : (18)

References (24)
  • 6
    • 0033689702 scopus 로고    scopus 로고
    • Architectural support for scalable speculative parallelization in shared-memory multiprocessors
    • June
    • M. Cintra et al. Architectural Support for Scalable Speculative Parallelization in Shared-Memory Multiprocessors. In Proceedings of the Intl. Symposium on Computer Architecture, June 2000.
    • (2000) Proceedings of the Intl. Symposium on Computer Architecture
    • Cintra, M.1
  • 15
    • 28444488425 scopus 로고    scopus 로고
    • Montecito: The next product in the itanium processor family
    • Aug.
    • C. McNairy. Montecito: The next Product in the Itanium Processor Family. In the Conference Record of Hot Chips 16, Aug. 2004.
    • (2004) The Conference Record of Hot Chips 16
    • McNairy, C.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.