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Volumn , Issue , 2005, Pages 13-21

Optimised FPGA implementation of a multi program PCR measurement system in DVB-T

Author keywords

ADPLL; Architecture optimisation; FPGA; PCR related measurement

Indexed keywords

ADPLL; ARCHITECTURE OPTIMISATION; EMBEDDED PROCESSORS; FPGA IMPLEMENTATIONS; MEASUREMENT STANDARDS; PHASE LOCKED LOOP (PLL); PROGRAM CLOCK REFERENCES; REALTIME PROCESSING;

EID: 33744952915     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (2)

References (15)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.