Simultaneous reduction of dynamic and static power in scan structures

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn II, Issue , 2005, Pages 846-851

  Sharifi, Shervin ^a   Jaffari, Javid ^a   Hosseinabady, Mohammad ^a   Afzali Kusha, Ali ^a   Navabi, Zainalabedin ^a  

^a UNIVERSITY OF TEHRAN   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CRITICAL PATH ANALYSIS; INTEGRATED CIRCUIT TESTING; LEAKAGE CURRENTS;

DYNAMIC PORTION; ISCAS89 BENCHMARK; NON-MULTIPLEXED SCAN CELLS; SCAN STRUCTURES;

ENERGY DISSIPATION;

EID: 33646917204     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.270     Document Type: Conference Paper

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