Decoupling capacitors for multi-voltage power distribution systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 3, 2006, Pages 217-228

  Popovich, Mikhail ^b   Friedman, Eby G ^a,b,c,d,e  

^a IEEE   (United States)

^b University of Rochester   (United States)

^c High Performance VLSI/IC Design and Analysis Laboratory   (United States)

^d Center for Electronic Imaging Systems   (United States)

^e Technical Program Committee   (United States)

Author keywords

Decoupling capacitors; Multiple power supply voltages; Power distribution networks; Resistance inductance capacitance (RLC) impedance

Indexed keywords

DECOUPLING CAPACITORS; MULTIPLE POWER SUPPLY VOLTAGES; POWER DISTRIBUTION NETWORKS; RESISTANCE-INDUCTANCE-CAPACITANCE (RLC) IMPEDANCE;

ELECTRIC IMPEDANCE; ELECTRIC POTENTIAL; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER UTILIZATION; MICROPROCESSOR CHIPS; NATURAL FREQUENCIES;

CAPACITORS;

EID: 33646412351     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.871756     Document Type: Article

References (22)

1. A. Chandrakasan, M. Potkonjak, J. Rabaey, and R. W. Brodersen, "HYPER-LP: A system for power minimization using architectural transformations," in Proc. IEEE Int. Conf. Comput.-Aided Des., 1992, pp. 300-303.
2. A. Chandrakasan, S. Sheng, and R. Brodersen, "Low-power CMOS digital design," IEEE J. Soiid-State Circuits, vol. 27, no. 4, pp. 474-484, Apr. 1992.
3. J. Mermet and W. Nebel, Low Power Design in Deep Submicron Electronics, Norwell, MA: Kluwer, 1997.
4. A. Chandrakasan, W. J. Bowhill, and F. Fox, Design of High-Performance Microprocessor Circuits. New York: Wiley, 2000.
5. K. Usami and M. Horowitz, "Clustered voltage scaling technique for low-power design," in Proc. IEEE Int. Workshop Low Power Des., 1995, pp. 3-8.
6. J.-M. Chang and M. Pedram, "Energy minimization using multiple supply voltages," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 5, no. 4, pp. 425-435, Dec. 1997.
7. S. Raje and M. Sarrafzadeh, "Variable voltage scheduling," in Proc. ACM Int. Symp. Low Power Des., Apr. 1995, pp. 9-14.
8. A. V. Mezhiba and E. G. Friedman, Power Distribution Networks in High Speed Integrated Circuits. Norwell, MA: Kluwer, 2004.
9. L. D. Smith, R. E. Anderson, D. W. Forehand, T. J. Pelc, and T. Roy, "Power distribution system design methodology and capacitor selection for modern CMOS technology," IEEE Trans. Adv. Packag., vol. 22, no. 3, pp. 284-291, Aug. 1999.
10. S. R. Nassif and O. Fakhouri, "Technology trends in power-grid-induced noise," in Proc. ACM Int. Workshop Syst. Level Interconnect Prediction, 2002, pp. 55-59.
11. L. D. Smith, "Packaging and power distribution design considerations for a sun microsystems desktop workstation," in Proc. Elect. Performance Electron. Packag, Conf., 1997, pp. 19-22.
12. W. D. Becker et al., "Modeling, simulation and measurement of mid-frequency simultaneous switching noise in computer systems," IEEE Trans. Comp., Packag., Manuf. Technol., vol. 21, no. 2. pt. B, pp. 157-163, May 1998.
13. H. B. Bakoglu, Circuits, Interconnections, and Packaging for VLSI. Reading, MA: Addison-Wesley, 1990.
14. I. Novak et al., "Distributed matched bypassing for board-level power distribution networks," IEEE Trans. Adv. Packag., vol. 25, no. 2, pp. 230-243, May 2002.
15. M. Popovich and E. G. Friedman, "Impedance characteristics of decoupling capacitors in multi-power distribution systems," in Proc. IEEE Int. Conf. Election., Circuits Syst., Dec. 2004, pp. 160-163.
16. A. V. Mezhiba and E. G. Friedman, "Inductive properties of high-performance power distribution grids," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 10, no. 6, pp. 762-776, Dec. 2002.
17. M. Popovich and E. G. Friedman, "Decoupling capacitors for power distribution systems with multiple power supply voltages," in Proc. IEEE SOC Conf., 2004, pp. 331-334.
18. _, "Noise coupling in multi-voltage power distribution systems with decoupling capacitors," in Proc. IEEE Int. Symp. Circuits Syst., 2005, vol. I, pp. 620-623.
19. _, "Noise aware decoupling capacitors for multi-voltage power distribution systems," in Proc. IEEE Int. Svmp. Quality Electron. Des., 2005, pp. 334-339.
20. V. Kursun, S. G. Narendra, V. K. De, and E. G. Friedman, "Analysis of buck Converters for on-chip integration with a dual supply voltage microprocessor," IEEE Trans. Very Large Scale Integr: (VLSI) Syst., vol. 11, no. 3, pp. 514-522, Mar. 2003.
21. C. R. Paul, Analysis of Linear Circuits. New York: McGraw-Hill, 1989.
22. M. K. Gowan, L. L. Biro, and D. B. Jackson, "Power considerations in the design of the alpha 21264 microprocessor." in Proc. IEEE/ACM Des. Automat. Conf., 1998, pp. 726-731.