Compact modeling of high-voltage LDMOS devices including quasi-saturation

IEEE Transactions on Electron Devices

Volumn 53, Issue 4, 2006, Pages 897-902

  Aarts, Annemarie C T ^a,b   Kloosterman, Willy J ^c  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

^b EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

^c NXP SEMICONDUCTORS   (Netherlands)

Author keywords

High voltage MOS; Integrated circuit design; LDMOS; Modeling; Quasi saturation

Indexed keywords

ELECTRIC CURRENT CONTROL; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; VOLTAGE CONTROL;

COMPACT TRANSISTOR MODEL; HIGH VOLTAGE DEVICES; QUASI SATURATION;

MOS DEVICES;

EID: 33645742371     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.870423     Document Type: Article

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