Gate resistance modeling of multifin MOS devices

IEEE Electron Device Letters

Volumn 27, Issue 1, 2006, Pages 68-70

  Wu, Wen ^a   Chan, Mansun ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

FinFET; Gate resistance; Radio frequency (RF); RC delay

Indexed keywords

FIELD EFFECT TRANSISTORS; GATES (TRANSISTOR); POLYSILICON; SEMICONDUCTOR DEVICE MODELS;

FIN HEIGHT; FIN SPACING; GATE RESISTANCE MODELING; MULTIFIN MOS DEVICES; POLYSILICON THICKNESS; RADIO FREQUENCY (RF); RC DELAY;

MOS DEVICES;

EID: 33645473347     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2005.861599     Document Type: Article

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