High reliability flip chip using low cte laminate substrates

American Society of Mechanical Engineers, Electronic and Photonic Packaging, EPP

Volumn 5, Issue , 2005, Pages 185-198

  Copeland, D Scott ^a   Rahim, M Kaysar ^a   Suhling, Jeffrey C ^a   Tian, Guoyun ^a   Lall, Pradeep ^a   Richard, C Jaeger ^a   Vasoya, Kris ^b  

^a AUBURN UNIVERSITY   (United States)

^b ThermalWorks Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DIE STRESSES; SILICON DIES; VACUUM STABILITY;

AEROSPACE VEHICLES; FINITE ELEMENT METHOD; LAMINATES; PRINTED CIRCUIT BOARDS; THERMAL CYCLING; THERMAL EXPANSION;

FLIP CHIP DEVICES;

EID: 33645070802     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1115/IMECE2005-82662     Document Type: Conference Paper

References (16)

1. Tech Note TN-513, Vishay Measurements Group.
2. NASA-STD-6001, "Flammability, Odor, Offgassing, and Compatibility Requirements and test procedures for Materials in Environments That Support Combustion," February 9, 1998.
3. ASTM E595-93, "Standard Test Method for Total Mass Loss and Collected Volatile Condensable Materials from Outgassing in a Vacuum Environment," 1999.
4. SP-R-0022A, "General Specification Vacuum Stability Requirements of Polymeric Material for Spacecraft Applications," September 9, 1974.
5. Sweet, J. N., "Die Stress Measurement Using Piezoresistive Stress Sensors," in Thermal Stress and Strain in Microelectronics Packaging, Edited by J. Lau, Von Nostrand Reinhold, 1993.
6. Suhling, J. C., and Jaeger, R. C., "Silicon Piezoresistive Stress Sensors and Their Application in Electronic Packaging," IEEE Sensors Journal, Vol. 1(1), pp. 14-30, 2001.
7. Bittle, D. A., Suhling, J. C., Beaty, R. E., Jaeger, R. C., and Johnson, R. W., "Piezoresistive Stress Sensors for Structural Analysis of Electronic Packages," Journal of Electronic Packaging, Vol 113(3), pp. 203-215, 1991.
8. Cordes, R. A., Suhling, J. C., Kang, Y., and Jaeger, R. C., "Optimal Temperature Compensated Piezoresistive Stress Sensor Rosettes," Proceedings of the Symposium on Applications of Experimental Mechanics to Electronic Packaging, ASME, EEP-Vol. 13, pp. 109-116, 1995.
9. Jaeger, R. C., Suhling, J. C. and Ramani, R., "Thermally Induced Errors in the Application of Silicon Piezoresistive Stress Sensors," Advances in Electronic Packaging 1993 - Proceedings of the 1993 ASME International Electronic Packaging Conference, Binghamton, NY, September 29-October 2, 1993, pp. 457-470, 1993.
10. Jaeger, R. C., Suhling, J. C. and Ramani, R., "Errors Associated with the Design, Calibration of Piezoresistive Stress Sensors in (100) Silicon," IEEE Transactions on Components, Packaging, and Manufacturing Technology - Part B: Advanced Packaging, Vol. 17(1), pp. 97-107, 1994.
11. Suhling, J. C., Jaeger, R. C., Lin, S. T., Mian, A. K. M., Cordes, R. A. and Wilamowski, B. M., "Design and Calibration of Optimized (111) Silicon Stress Sensing Test Chips," Proceedings of InterPACK '97, pp. 1723-1729, Kohala, HI, June 15-19, 1997.
12. Ernst, L. J., Hof, C., Yang, D. G., Kiasat, M.S., Zhang, G. Q., Bressers, H. J. L, Caers, J. F. J., den Boer, A. W. J., and Janssen, J., "Determination of Visco-Elastic Properties During the Curing Process of Underfill Materials," Proceedings of the 50th Electronic Components and Technology Conference, pp. 1070-1077, Las Vegas, NV, May 21-24, 2000.
13. Yang, D. G., Zhang, G. Q., Ernst, L. J., Caers, J. F. J., Bressers, H. J. L., and Janssen, J., "Combined Experimental and Numerical Investigation on Flip Chip Solder Fatigue with Cure-Dependent Underfill Properties," Proceedings of the 51st Electronic Components and Technology Conference, pp. 919-924, Orlando, FL, May 29 - June 1, 2001.
14. Yang, D. G., Zhang, G. Q., van Driel, W., Bressers, H. J. L., Ernst, L. J., "Parameter Sensitivity Study of Cure-Dependent Underfill Properties on Flip Chip Failures," Proceedings of the 52nd Electronic Components and Technology Conference, pp. 865-872, San Diego, CA, May 28-31, 2002.
15. Rahim, M. K., Suhling, J. C., Copeland, S., Jaeger, R. C., Lall, P., and Johnson, R. W., "Characterization of Die Stresses in Flip Chip on Laminate Assemblies Using (111) Silicon Stress Test Chips," Proceedings of the 53rd Electronic Components and Technology Conference, pp. 905-919, New Orleans, LA, May 27-30, 2003.
16. Rahim, M. K., Suhling, J. C., Copeland, D. S., Islam, M. S., Jaeger, R. C., Lall, P., Johnson, R. W., "Measurement of Thermally Induced Die Stresses in Flip Chip on Laminate Assemblies," Proceedings of ITHERM 2004, pp. 1-12, Las Vegas, NV, June 1-4, 2004.