A combined gate replacement and input vector control approach for leakage current reduction

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 2, 2006, Pages 173-182

  Yuan, Lin ^a   Qu, Gang ^a  

^a UNIVERSITY OF MARYLAND   (United States)

Author keywords

Gate replacement; Leakage reduction; Minimum leakage vector (MLV)

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMBINATORIAL CIRCUITS; GENETIC ALGORITHMS; LOGIC GATES; NETWORKS (CIRCUITS); TRANSISTORS;

DIVIDE-AND-CONQUER; GATE REPLACEMENT; HEURISTIC; LEAKAGE REDUCTION; MINIMUM LEAKAGE VECTOR (MLV);

LEAKAGE CURRENTS;

EID: 33645009272     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2005.863747     Document Type: Article

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