Dynamic register renaming through virtual-physical registers

Journal of Instruction-Level Parallelism

Volumn 2, Issue , 2000, Pages

  Monreal, Teresa ^a   González, Antonio ^b   Valero, Mateo ^b   González, José ^c   Viñals, Víctor ^a  

^a UNIVERSITY OF ZARAGOZA   (Spain)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^c UNIVERSITY OF MURCIA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CODES (SYMBOLS); DATA STORAGE EQUIPMENT; FORMAL LOGIC; MICROELECTRONICS; MICROPROCESSOR CHIPS; PROBLEM SOLVING; RESOURCE ALLOCATION;

INSTRUCTION-LEVEL PARALLELISM (ILP); NON-NUMERIC CODES; VIRTUAL-PHYSICAL REGISTORS;

COMPUTER SCIENCE;

EID: 3242770599     PISSN: None     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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