Delaying physical register allocation through virtual-physical registers

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1999, Pages 186-192

  Monreal, Teresa ^a   Gonzalez, Antonio ^a   Valero, Mateo ^a   Gonzalez, Jose ^a   Vinals, Victor ^a  

^a UNIVERSITY OF ZARAGOZA   (Spain)

Author keywords

[No Author keywords available]

Indexed keywords

PARALLEL PROCESSING SYSTEMS; STORAGE ALLOCATION (COMPUTER);

REGISTER ALLOCATION; VIRTUAL PHYSICAL REGISTERS;

MICROPROCESSOR CHIPS;

EID: 0033334912     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)