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Volumn 50, Issue 2, 2006, Pages 205-208

Electrostatic coupling between nanocrystals in a quantum flash memory

Author keywords

Electrostatic coupling; Floating gate; Nanocrystals; Simulation; Tunneling

Indexed keywords

COMPUTER SIMULATION; ELECTRON TUNNELING; ELECTROSTATICS; NANOSTRUCTURED MATERIALS; QUANTUM THEORY;

EID: 32344438241     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2005.12.019     Document Type: Article
Times cited : (9)

References (17)
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  • 7
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    • Kinetic modelling of electron tunneling processes in quantum dots coupled to field-effect transistors
    • F. Rana, S. Tiwari, and J.J. Welser Kinetic modelling of electron tunneling processes in quantum dots coupled to field-effect transistors Superlattices Microstruct 23 3-4 1998 756 770
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    • Rana, F.1    Tiwari, S.2    Welser, J.J.3
  • 8
    • 1642390417 scopus 로고    scopus 로고
    • Electronic properties of semiconductor quantum dots for coulomb blockade applications
    • J. Sée, P. Dollfus, S. Galdin, and P. Hesto Electronic properties of semiconductor quantum dots for coulomb blockade applications Physica E 21 2004 496 500
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    • Sée, J.1    Dollfus, P.2    Galdin, S.3    Hesto, P.4
  • 9
    • 7044220853 scopus 로고    scopus 로고
    • The simulation of single-charging effects in the programming characteristics of nanocrystal memories
    • J.S. Sim, J.D. Lee, and B.-G. Park The simulation of single-charging effects in the programming characteristics of nanocrystal memories Nanotechnology 15 2004 S603 S611
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    • Sim, J.S.1    Lee, J.D.2    Park, B.-G.3
  • 10
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    • Tunneling from a many-particle point of view
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    • Single-electron charging effect in individual Si nanocrystals
    • T. Baron, P. Gentile, N. Magnea, and P. Mur Single-electron charging effect in individual Si nanocrystals Appl Phys Lett 79 8 2001 1175 1177
    • (2001) Appl Phys Lett , vol.79 , Issue.8 , pp. 1175-1177
    • Baron, T.1    Gentile, P.2    Magnea, N.3    Mur, P.4
  • 15
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    • Electronic and dielectric properties of a suboxide interlayer at the silicon-oxide interface in MOS devices
    • F. Giustino, and A. Pasquarello Electronic and dielectric properties of a suboxide interlayer at the silicon-oxide interface in MOS devices Surf Sci 586 2005 183 191
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.