A SPICE-compatible model for nanoscale MOSFET capacitor simulation under the inversion condition

IEEE Transactions on Nanotechnology

Volumn 1, Issue 4, 2002, Pages 243-246

  Tang, Ting Wei ^a,b   Li, Yiming ^{a,c,d,e,f,g,h}  

^a IEEE   (United States)

^b University of Massachusetts   (United States)

^c NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

^d NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^e NCTU ^*  (Greece)

^f Institute of Electronic Information and Communication Engineers   (Japan)

^g AMERICAN PHYSICAL SOCIETY   (United States)

^h Society for Industrial and Applied Mathematics   (Taiwan)

Author keywords

C V curve; Compact charge model; Device and circuit simulation; MOSFETs; Quantum correction; Schr dinger Poisson

Indexed keywords

C-V CURVE; COMPACT CHARGE MODEL; DEVICE AND CIRCUIT SIMULATION; QUANTUM CORRECTION; SCHRÖDINGER-POISSON;

CARRIER CONCENTRATION; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC POTENTIAL; MATHEMATICAL MODELS; MOSFET DEVICES;

CAPACITORS;

EID: 3142764962     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2002.807389     Document Type: Conference Paper

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