MOSFET inversion layer capacitance model based on Fermi-Dirac statistics for wide temperature range

Solid-State Electronics

Volumn 41, Issue 3, 1997, Pages 507-509

  Chen, Kai ^a   Zhang, George ^a   Duster, Jon ^a   Hu, Chenming ^a   Huang, Jianhui ^b   Liu, Zhihong ^d   Ko, Ping K ^c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b INTEL CORPORATION   (United States)

^c HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^d NONE

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ELECTRIC FIELD EFFECTS; FERMI LEVEL; SEMICONDUCTOR DEVICE MODELS; STATISTICAL MECHANICS; THERMAL EFFECTS;

FERMI DIRAC STATISTICS;

MOSFET DEVICES;

EID: 0031099471     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(96)00104-9     Document Type: Article

References (5)

1. S. M. Sze, Physics of Semiconductor Devices, 2nd Edn, p. 366. Wiley, New York (1981).
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3. M. S. Liang, J.Y. Choi, P. K. Ko and C. Hu, IEEE Trans. Electron Devices ED-33, 409 (1986).
4. S. A. Hareland, S. Krishnamurthy, S. Jallepalli, C.-F. Yeap, K. Hasnat, A. F. Tasch, Jr and C. M. Maziar, IEDM p. 933 (1995).
5. C. Kittle and H. Kroemer, Thermal Physics, 2nd edition, p. 365. W. H. Freeman, San Francisco (1980).