An overview of power analysis attacks against field programmable gate arrays

Proceedings of the IEEE

Volumn 94, Issue 2, 2006, Pages 383-394

  Standaert, François Xavier ^a   Peeters, Eric ^a   Rouvroy, Gael ^a   Quisquater, Jean Jacques ^a  

^a UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

Block ciphers; Cryptographic hardware; Field programmable gate array (FPGA); Physical security; Power analysis; Side channel attacks

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; COSTS; POWER ELECTRONICS; PROGRAMMABLE LOGIC CONTROLLERS; SECURITY SYSTEMS; SMART CARDS; THEOREM PROVING;

BLOCK CIPHERS; CRYPTOGRAPHIC HARDWARE; PHYSICAL ANALYSIS; PHYSICAL SECURITY; SIDE CHANNEL ATTACKS;

CRYPTOGRAPHY;

EID: 31344461368     PISSN: 00189219     EISSN: None     Source Type: Journal    
DOI: 10.1109/JPROC.2005.862437     Document Type: Conference Paper

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