Power analysis attacks against FPGA implementations of the DES

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3203, Issue , 2004, Pages 84-94

  Standaert, François Xavier ^a   Örs, Siddika Berna ^b   Quisquater, Jean Jacques ^a   Preneel, Bart ^b  

^a UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CRYPTOGRAPHY; ELECTRIC POWER UTILIZATION; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); SIGNAL ANALYSIS; SMART CARDS; TRANSPORTATION;

CRYPTOGRAPHIC APPLICATIONS; DATA ENCRYPTION STANDARD; DIFFERENTIAL POWER ANALYSIS; FPGA IMPLEMENTATIONS; SECRET INFORMATION; SIDE-CHANNEL INFORMATION; SMART CARD IMPLEMENTATION; SPECIFIC PROPERTIES;

SIDE CHANNEL ATTACK;

EID: 31344451762     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30117-2_11     Document Type: Article

References (12)

1. P. Kocher, J. Jaffe, B. Jun, Differential Power Analysis, in the proceedings of CRYPTO 99, Lecture Notes in Computer Science 1666, pp 398-412, Springer-Verlag.
2. S.B. Ors, E. Oswald, B. Preneel, Power-Analysis Attacks on an FPGA - First Experimental Results, in the proceedings of CHES 2003, Lecture Notes in Computer Science, vol 2279, pp 35-50, Springer-Verlag.
3. F.X. Standaert, L.van Oldeneel, D. Samyde, J.J. Quisquater, Power Analysis of FPGAs, How Practical is the Attack?, in the proceedings of FPL 2003, Lecture Notes in Computer Science, vol 2278, pp 701-711, Springer-Verlag.
4. E. Brier, C. Clavier, F. Olivier, Optimal Statistical Power Analysis, IACR e-print archive 2003/152.
5. S.B. Ors, F. Gurkaynak, E. Oswald, B. Preneel Power-Analysis Attack on an ASIC AES implementation, in the proceedings of ITCC 2004, Las Vegas, April 5-7 2004.
6. Xilinx: Virtex 2.5V Field Programmable Gate Arrays Data Sheet, http://www.xilinx.com.
7. J.M. Rabaey, Digital Integrated Circuits, Prentice Hall International, 1996.
8. National Bureau of Standards. FIPS PUB 46, The Data Encryption Standard, Jan 1977.
9. NIST Home page, http://csrc.nist.gov/CryptoToolkit/aes/.
10. G. Rouvroy, F.X. Standaert, J.J. Quisquater, J.D. Legat, Design Strategies and Modified Descriptions to Optimize Cipher FPGA Implementations: Fast and Compact Results for DES and Triple-DES, in the proceedings of FPL 2003, LNCS 2778, pp 181-193, Springer-Verlag, 2003.
11. L. Shang, A. Kaviani, K. Bathala, Dynamic Power Consumption in Virtex2 FPGA Family, FPGA 2002, Monterey, California, 2002.
12. L.T. Mc Daniel, An Investigation of Differential Power Analysis Attacks on FPGA-based Encryption Systems, Master Thesis, Virginia Polytechnic Insitute, May 29, 2003.