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Volumn 10, Issue 2, 2005, Pages 279-302

A detailed power model for field-programmable gate arrays

Author keywords

Architecture; Power consumption; Power estimation model; Sensitivity analysis

Indexed keywords


EID: 30544455212     PISSN: 10844309     EISSN: 10844309     Source Type: Journal    
DOI: 10.1145/1059876.1059881     Document Type: Review
Times cited : (149)

References (33)
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    • Feedback, correlation, and delay concerns in the power estimation of VLSI circuits
    • NAJM, F. N. 1995a. Feedback, correlation, and delay concerns in the power estimation of VLSI circuits. In Proceedings of the ACM/IEEE Design Automation Conference. 612-617.
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    • Najm, F.N.1
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    • University of California, Berkeley, Berkeley, CA
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    • XAPP152, ver. 1.1. Xilinx, Inc., San Jose, CA
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.