A new short circuit power model for complex CMOS gates

Proceedings - IEEE Alessandro Volta Memorial Workshop on Low-Power Design, VOLTA 1999

Volumn , Issue , 1999, Pages 98-106

  Wang, Qi ^a   Vrudhula, Sarma B K ^a  

^a University of Arizona   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POWER SUPPLIES TO APPARATUS; SPICE; TIMING CIRCUITS;

CHANNEL WIDTHS; CMOS INVERTERS; CMOS PROCESSS; HSPICE SIMULATIONS; SHORT-CIRCUIT POWER; SHORT-CIRCUIT POWER ESTIMATION; SIGNAL WAVEFORM; TRADITIONAL APPROACHES;

CMOS INTEGRATED CIRCUITS;

EID: 30544431819     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPD.1999.750409     Document Type: Conference Paper

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