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Volumn , Issue , 2001, Pages 414-421

Interconnect-driven short-circuit power modeling

Author keywords

[No Author keywords available]

Indexed keywords

BUDGET CONTROL; CAPACITANCE; DESIGN; ELECTRIC POWER UTILIZATION; SYSTEMS ANALYSIS;

EID: 0842317898     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2001.952353     Document Type: Conference Paper
Times cited : (12)

References (11)
  • 6
    • 84969576008 scopus 로고    scopus 로고
    • B. Homepage. Device Research Group of the Department of E.E. and C.S., University of California, Berkeley
    • B. Homepage. http://www-device.eecs.berkeley.edu/~bsim3. Device Research Group of the Department of E.E. and C.S., University of California, Berkeley, 2000.
    • (2000)
  • 9
    • 0025415048 scopus 로고
    • Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas
    • April
    • T. Sakurai and A. R. Newton. Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas. IEEE Journal of Solid-State Circuits, 25:584-594, April 1990.
    • (1990) IEEE Journal of Solid-State Circuits , vol.25 , pp. 584-594
    • Sakurai, T.1    Newton, A.R.2
  • 11
    • 0021477994 scopus 로고
    • Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits
    • Aug.
    • H. J. M. Veendrick. Short-circuit dissipation of static CMOS circuitry and its impact on the design of buffer circuits. IEEE Journal of Solid-State Circuits, pages 468-473, Aug. 1984.
    • (1984) IEEE Journal of Solid-State Circuits , pp. 468-473
    • Veendrick, H.J.M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.