Balanced excitation and its effect on the fortuitous detection of dynamic defects

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 2, Issue , 2004, Pages 1066-1071

  Dworak, Jennifer ^a   Cobb, Brad ^a   Wingfield, James ^a   Mercer, M Ray ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECTIVE PART LEVEL (DPL); DYNAMIC DEFECTS; GREEDY ALGORITHM; STATIC DEFECTS; DEFECTIVE PARTS; DEGREE OF BALANCES; EXCITATION BALANCE; SITE OBSERVATION;

ALGORITHMS; BENCHMARKING; COMPUTER SIMULATION; DEFECTS; FAILURE ANALYSIS; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; EXHIBITIONS;

INTEGRATED CIRCUIT MANUFACTURE; DEFECTS;

EID: 3042606374     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1269034     Document Type: Conference Paper

References (9)

1. [Mill 88] S.D. Millman and E.J. McClusky, "Detecting bridging faults with stuck-at test sets," Proc. International Test Conference, 1988, pp. 773-783.
2. DDQ, functional and scan tests: how many fault coverages do we need?" Proc. International Test Conference, 1992, pp. 168-177.
3. [Ma 95] S. C. Ma, P. Franco, and E. J. McCluskey, "An experimental chip to evaluate test techniques: experiment results," Proc. International Test Conference, 1995, pp. 663-672.
4. [Butl 91] K. M. Butler and M. R. Mercer, "Quantifying non-target defect detection by target fault test sets," Proc. European Test Conference, Munich Germany, April 10-12, 1991, pp. 91-100.
5. [Grim 99] M. R. Grimaila, S. Lee, J. Dworak, K. M. Butler, F. Stewart, H. Balachandran, B. Houchins, V. Mathur, J. Park, Li-C. Wang, and M. R. Mercer, " REDO - Random Excitation and Deterministic Observation - first commercial experiment," Proc. VLSI Test Symposium, 1999, pp. 268-274.
6. [Dwor 01] J. Dworak, J. Wicker, S. Lee, M. R. Grimaila, K. M. Butler, B. Stewart, L-C. Wang, and M. R. Mercer, "Defect-Oriented Testing and Defective-Part-Level Prediction," IEEE Design and Test of Computers, January-February, 2001. Vol. 18, No. 1, pp. 31-41.
7. [Lee 02] S. Lee, B. Cobb, J. Dworak, M.R. Grimaila, and M.R. Mercer, "A new ATPG algorithm to limit test set size and achieve multiple detections of all faults," Proc. Design, Automation and Test in Europe Conference and Exhibition, 2002. pp. 94-99.
8. th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002, pp. 177-185.
9. [Pom 01] Pomeranz, I. and Reddy, S., "Definitions of the Numbers of Detections of Target Faults and their Effectiveness in Guiding Test Generation for High Defect Coverage," Design, Automation, and Test in Europe, March 13-16, 2001, pp. 504-508.