메뉴 건너뛰기




Volumn 1, Issue , 2004, Pages 102-107

A crosstalk aware interconnect with variable cycle transmission

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; DATA COMMUNICATION SYSTEMS; ENCODING (SYMBOLS); ERROR CORRECTION; MICROPROCESSOR CHIPS; OPTIMIZATION; PRODUCT DESIGN; SYSTEMS ANALYSIS; BUSES; EXHIBITIONS;

EID: 3042561817     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (51)

References (13)
  • 6
    • 0003465202 scopus 로고    scopus 로고
    • The simplescalar tool-set, version 2.0
    • Dept. of Computer Science, UW, June
    • D. C. Burger and T. M. Austin. The SimpleScalar tool-set, Version 2.0. Technical Report 1342, Dept. of Computer Science, UW, June 1997.
    • (1997) Technical Report , vol.1342
    • Burger, D.C.1    Austin, T.M.2
  • 8
    • 3042554652 scopus 로고    scopus 로고
    • Static crosstalk analysis assures silicon success
    • June 5
    • B. Kiani. Static crosstalk analysis assures silicon success. EE Times, June 5, 2002.
    • (2002) EE Times
    • Kiani, B.1
  • 13
    • 0032254713 scopus 로고    scopus 로고
    • Impact of crosstalk on delay time and a hierarchy of interconnects
    • K. Yamashita and S. Odanaka. Impact of crosstalk on delay time and a hierarchy of interconnects. In IEDM '98 Technical Digest, pages 291-294, 1998.
    • (1998) IEDM '98 Technical Digest , pp. 291-294
    • Yamashita, K.1    Odanaka, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.