Effects of on-chip inductance on power distribution grid

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E88-A, Issue 12, 2005, Pages 3564-3572

  Muramatsu, Atsushi ^a   Hashimoto, Masanori ^a,b   Onodera, Hidetoshi ^a  

^a KYOTO UNIVERSITY   (Japan)

^b OSAKA UNIVERSITY   (Japan)

Author keywords

Decoupling capacitance; On chip inductance; Power distribution network; Power supply noise

Indexed keywords

CAPACITANCE; ELECTRIC WIRE; ENERGY UTILIZATION; FREQUENCIES; INDUCTANCE; NOISE ABATEMENT;

DECOUPLING CAPACITANCE; ON-CHIP INDUCTANCE; POWER DISTRIBUTION NETWORK; POWER SUPPLY NOISE;

ELECTRIC POWER DISTRIBUTION;

EID: 29144513873     PISSN: 09168508     EISSN: 17451337     Source Type: Journal    
DOI: 10.1093/ietfec/e88-a.12.3564     Document Type: Article

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