Single chip implementation of motion estimator dedicated to MPEG2 MP@HL

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E79-A, Issue 8, 1996, Pages 1210-1216

  Onoye, Takao ^a   Fujita, Gen ^a   Takatsu, Masamichi ^a,b   Shirakawa, Isao ^a   Yamai, Nariyoshi ^a  

^a OSAKA UNIVERSITY   (Japan)

^b DoGA Corporation

Author keywords

HDTV; Motion estimation; MPEG2; VLSI

Indexed keywords

ALGORITHMS; BANDWIDTH; COMPUTATIONAL METHODS; HIGH DEFINITION TELEVISION; IMAGE COMPRESSION; MOTION PICTURES; REAL TIME SYSTEMS; VECTORS; VLSI CIRCUITS;

FRAME MEMORY INTERFACE; HIERARCHICAL SEARCHING ALGORITHM; MOTION ESTIMATOR;

CMOS INTEGRATED CIRCUITS;

EID: 0030218750     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (11)

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