Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn , Issue , 2005, Pages 8-13

  Mukhopadhyay, Saibal ^a   Kim, Keunwoo ^b   Chuang, Ching Te ^b   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

Double Gate devices; Gate leakage; Quantum effect; SRAM; Stacking effect; Subthreshold leakage

Indexed keywords

COMPUTER SIMULATION; DOPING (ADDITIVES); ELECTRON TUNNELING; GATES (TRANSISTOR); QUANTUM THEORY; STATIC RANDOM ACCESS STORAGE;

DOUBLE-GATE DEVICES; GATE LEAKAGE; QUANTUM EFFECT; STACKING EFFECT; SUBTHRESHOLD LEAKAGE;

LEAKAGE CURRENTS;

EID: 28444470231     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1077603.1077608     Document Type: Conference Paper

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