-
1
-
-
0035242870
-
Robust subthreshold logic for ultra-low power operation
-
Feb
-
H. Soeleman, K. Roy, and B. Paul, "Robust subthreshold logic for ultra-low power operation," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 9, pp. 90-99, Feb 2001.
-
(2001)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
, vol.9
, pp. 90-99
-
-
Soeleman, H.1
Roy, K.2
Paul, B.3
-
2
-
-
0033688320
-
Digital CMOS logic operation in the sub-threshold region
-
Mar
-
H. Soeleman and K. Roy, "Digital CMOS logic operation in the sub-threshold region," in Tenth Great Lakes Symposium on VLSI, pp. 107-112, Mar 2000.
-
(2000)
Tenth Great Lakes Symposium on VLSI
, pp. 107-112
-
-
Soeleman, H.1
Roy, K.2
-
5
-
-
0036858210
-
Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage, in
-
Nov
-
J. Tschanz, J. Kao, S. Narendra, R. Nair, D. Antoniadis, A. Chandrakasan, and V. De, "Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage," in IEEE Journal of Solid-State Circuits, vol. 37, pp. 1396-1402, Nov 2002.
-
(2002)
IEEE Journal of Solid-state Circuits
, vol.37
, pp. 1396-1402
-
-
Tschanz, J.1
Kao, J.2
Narendra, S.3
Nair, R.4
Antoniadis, D.5
Chandrakasan, A.6
De, V.7
-
7
-
-
0033712799
-
New paradigm of predictive MOSFET and interconnect modeling for early circuit design
-
Jun
-
Y. Cao, T. Sato, D. Sylvester, M. Orshansky, and C. Hu, "New paradigm of predictive MOSFET and interconnect modeling for early circuit design," in Proc. of IEEE Custom Integrated Circuit Conference, pp. 201-204, Jun 2000. http://www-device.eecs-berkeley.edu/ptm.
-
(2000)
Proc. of IEEE Custom Integrated Circuit Conference
, pp. 201-204
-
-
Cao, Y.1
Sato, T.2
Sylvester, D.3
Orshansky, M.4
Hu, C.5
-
9
-
-
0032678594
-
A novel VLSI layout fabric for deep sub-micron applications
-
(New Orleans), June
-
S. Khatri, A. Mehrotra, R. Brayton, A. Sangiovanni-Vincentelli, and R. Otten, "A novel VLSI layout fabric for deep sub-micron applications," in Proceedings of the Design Automation Conference, (New Orleans), June 1999.
-
(1999)
Proceedings of the Design Automation Conference
-
-
Khatri, S.1
Mehrotra, A.2
Brayton, R.3
Sangiovanni-Vincentelli, A.4
Otten, R.5
-
10
-
-
0034478038
-
Cross-talk immune VLSI design using a network of PLAs embedded in a regular layout fabric
-
Nov
-
S. Khatri, R. Brayton, and A. Sangiovanni-Vincentelli, "Cross-talk immune VLSI design using a network of PLAs embedded in a regular layout fabric," in IEEE/ACM International Conference on Computer Aided Design, pp. 412-418, Nov 2000.
-
(2000)
IEEE/ACM International Conference on Computer Aided Design
, pp. 412-418
-
-
Khatri, S.1
Brayton, R.2
Sangiovanni-Vincentelli, A.3
|