Digital CMOS logic operation in the sub-threshold region

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 2000, Pages 107-112

  Soeleman, Hendrawan ^a   Roy, Kaushik ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; SPECTRUM ANALYSIS;

SUB-THRESHOLD CIRCUITS;

CMOS INTEGRATED CIRCUITS;

EID: 0033688320     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/330855.331014     Document Type: Conference Paper

References (14)