Capacitance characterization in integrated circuit development: The intimate relationship of test structure design, equivalent circuit and measurement methodology

IEEE International Conference on Microelectronic Test Structures

Volumn , Issue , 2005, Pages 213-217

  Brown, George A ^a  

^a SEMATECH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DIELECTRIC MATERIALS; INTEGRATED CIRCUITS; MATERIALS SCIENCE;

C-V CHARACTERIZATION; CIRCUIT MATCHING; STRUCTURE DESIGN;

MICROELECTRONICS;

EID: 27644491407     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Henson, W. K., et al., "Estimating Oxide Thickness of Tunnel Oxides Down to 1.4 nm Using Conventional Capacitance Measurements on MOS Capacitors," IEEE Elect. Dev. Lett., 20, #4 (1999), pp.179-181.
2. Yang, K. and Hu, C., "MOS Capacitance Measurements for High-Leakage Thin Dielectrics," IEEE Trans. on Elect. Dev. 46, #7 (1999), pp. 1500-1501.
3. J. Schmitz et al., "Test Structure Design Considerations for RF-CV Measurements on Leaky Dielectrics," Proc. 2003 IEEE ICMTS (2003), pp. 181-185.
4. Rideau, D. et al., Series Resistance Estimation and C(V) Measurements on Ultra Thin Oxide MOS Capacitors," Proc. 2003 IEEE ICMTS ibid. PP. 191-196.
5. Okama, Y. et al., "The Negative Capacitance Effect on the C-V Measurement of Ultra Thin Gate Dielectrics Induced by the Stray Capacitance of the Measurement System," Proc. 2003 IEEE ICMTS ibid., pp.197-202.
6. We are indebted to IMEC and Philips Research Laboratories for access to this set of test structures.