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Volumn , Issue , 2005, Pages 584-587

Transfer of metal MEMS packages using a wafer-level solder sacrificial layer

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS PACKAGING; ELECTROPLATING; SILICON WAFERS; SOLDERING; THERMAL EFFECTS;

EID: 26844463988     PISSN: 10846999     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (3)

References (10)
  • 1
    • 0035008072 scopus 로고    scopus 로고
    • A sub-micron capacitive gap process for multiple-metal-electrode lateral micromechanical resonators
    • Interlaken, Jan 21-25
    • W.T. Hsu, J.R. Clark, C.T.-C. Nguyen, "A sub-micron capacitive gap process for multiple-metal-electrode lateral micromechanical resonators", Proc IEEE Micro Electro Mech Syst MEMS, Interlaken, Jan 21-25, 2001, pp. 349-352.
    • (2001) Proc IEEE Micro Electro Mech Syst MEMS , pp. 349-352
    • Hsu, W.T.1    Clark, J.R.2    Nguyen, C.T.-C.3
  • 2
    • 0038397228 scopus 로고    scopus 로고
    • Micropackaging technologies for integrated microsystems: Applications to MEMS and MOEMS
    • Jan 27-29
    • K. Najafi., "Micropackaging technologies for integrated microsystems: Applications to MEMS and MOEMS", Proc. SPIE 2003 Micromachining and Microfabrication Process Technology VIII, vol 4983, Jan 27-29, 2003, pp.1-19.
    • (2003) Proc. SPIE 2003 Micromachining and Microfabrication Process Technology VIII , vol.4983 , pp. 1-19
    • Najafi, K.1
  • 3
    • 1942436715 scopus 로고    scopus 로고
    • A low-temperature thin-film electroplated metal vacuum package
    • B.H. Stark and K. Najafi, "A low-temperature thin-film electroplated metal vacuum package", J. Microelectromech. Syst., vol. 13, pp. 147-157, 2004.
    • (2004) J. Microelectromech. Syst. , vol.13 , pp. 147-157
    • Stark, B.H.1    Najafi, K.2
  • 6
    • 2342511565 scopus 로고    scopus 로고
    • Selective low temperature microcap packaging technique through flip chip and wafer level alignment
    • C.T. Pan, "Selective low temperature microcap packaging technique through flip chip and wafer level alignment", J. Micromechanics and Microengineering, vol. 14, pp. 522-529, 2004.
    • (2004) J. Micromechanics and Microengineering , vol.14 , pp. 522-529
    • Pan, C.T.1
  • 7
    • 7244226133 scopus 로고    scopus 로고
    • A wafer-level microcap array to enable high-yield microsystem packaging
    • Y. J. Chiang, M. Bachman, and G.P. Li, "A Wafer-Level Microcap Array to Enable High-Yield Microsystem Packaging", IEEE Trans. on Advanced Packaging, Vol. 27, No. 3, 2004.
    • (2004) IEEE Trans. on Advanced Packaging , vol.27 , Issue.3
    • Chiang, Y.J.1    Bachman, M.2    Li, G.P.3
  • 10
    • 0032642046 scopus 로고    scopus 로고
    • Morphology and long term stability of Ni/Ni interconnections based on diffusion soldering
    • P.K. Khanna, G. Dalke, and W. Gust, "Morphology and long term stability of Ni/Ni interconnections based on diffusion soldering", Materials Research and Advanced Techniques, vol. 90, pp. 722-726, 1999.
    • (1999) Materials Research and Advanced Techniques , vol.90 , pp. 722-726
    • Khanna, P.K.1    Dalke, G.2    Gust, W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.