Low-power technology mapping for FPGA architectures with dual supply voltages

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn 12, Issue , 2004, Pages 109-117

  Chen, Deming ^a   Cong, Jason ^a   Li, Fei ^a   He, Lei ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Dual supply voltage; Low power FPGA; Technology mapping

Indexed keywords

ALGORITHMS; ELECTRIC LOSSES; ELECTRIC POTENTIAL; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; OPTIMIZATION; POWER CONTROL;

DUAL SUPPLY VOLTAGE SCALING (DSVS); LOW-POWER FPGA; MAPPING ALGORITHMS; TECHNOLOGY MAPPING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 2442480635     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/968280.968297     Document Type: Conference Paper

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