Control of threshold-voltage and short-channel effects in ultrathin strained-SOI CMOS devices

IEEE Transactions on Electron Devices

Volumn 52, Issue 8, 2005, Pages 1780-1786

  Numata, Toshinori ^a,b   Mizuno, Tomohisa ^c   Tezuka, Tsutomu ^a   Koga, Junji ^a   Takagi, Shin Ichi ^c  

^a MIRAI ASET   (Japan)

^b TOSHIBA CORPORATION   (Japan)

^c NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

MOSFETs; Silicon on insulator (SOI); Strained silicon (strained Si)

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; HETEROJUNCTIONS; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE; VOLTAGE CONTROL;

SHORT CHANNEL EFFECTS; STRAINED SILICON;

MOSFET DEVICES;

EID: 23344442050     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.851840     Document Type: Article

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