A low-parasitic collector construction for high-speed SiGe:C HBTs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2004, Pages 251-254

  Heinemann, B ^a   Barth, R ^a   Bolze, D ^a   Drews, J ^a   Formanek, P ^a   Grabolla, Th ^a   Haak, U ^a   Hoppner W ^a   Knoll, D ^a   Kopke K ^a   Kuck, B ^a   Kurps, R ^a   Marschmeyer, S ^a   Richter, H H ^a   Rucker H ^a   Schley, P ^a   Schmidt, D ^a   Winkler, W ^a   Wolansky, D ^a   Wulf, H E ^a   Yamamoto, Y ^a   more..

^a IHP   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CHEMICAL MECHANICAL POLISHING; DOPING (ADDITIVES); EPITAXIAL GROWTH; ETCHING; NITRIDES; TRANSMISSION ELECTRON MICROSCOPY;

COLLECTOR CONTACT REGION; GATE DELAYS; RING OSCILLATORS (RO); SHALLOW-TENCH ISOLATION (STI);

HETEROJUNCTION BIPOLAR TRANSISTORS;

BASE-COLLECTOR CAPACITANCE; BIPOLAR PROCESS; GATE DELAYS; HIGH SPEED; LOW-PARASITIC; PARASITICS; RF PERFORMANCE; RING OSCILLATOR; SIGE:C-HBT; UNDERETCHING;

EID: 21644476475     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. max=375GHz/210GHz," Int. Conf. on InP and Related Met., p. 374, 2003.
2. max of 300GHz," RFIC Symp., p. 395, 2004.
3. J. Böck et al., "SiGe bipolar technology for automotive radar applications," in Proc. BCTM, p. 84, 2004.
4. H. Rücker et al., "SiGe:C BiCMOS technology with 3.6 ps gate delay," IEDM Tech. Dig., p. 121, 2003.
5. B. Jagannathan et al., "3.9 ps SiGe HBT ECL ring oscillator and transistor design for minimum gate delay," IEEE Electron Device Lett., vol 24, pp. 324-326, May 2003.
6. B. Heinemann et al., "A complementary BiCMOS technology with high speed npn and pnp SiGe:C HBTs," IEDM Tech. Dig., p 117, 2003.