A 64-bit microprocessor in 130-nm and 90-nm technologies with power management features

IEEE Journal of Solid-State Circuits

Volumn 40, Issue 1, 2005, Pages 19-26

  Rohrer, Norman J ^a   Lichtenau, Cédric ^b   Sandon, Peter A ^a   Kartschoke, Paul ^a   Cohen, Erwin ^a   Canada, Miles G ^a   Pflüger, Thomas ^b   Ringler, Mathew I ^a   Hilgendorf, Rolf B ^a   Geissler, Stephen ^a   Zimmerman, Jeffrey S ^a  

^a IBM   (United States)

^b IBM   (Germany)

Author keywords

CMOS integrated circuits; Microprocessors; Silicon on insulator technology

Indexed keywords

COMPUTER SOFTWARE; DATA FLOW ANALYSIS; DATA REDUCTION; ELECTRIC CLOCKS; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; MICROPROCESSOR CHIPS; SILICON ON INSULATOR TECHNOLOGY;

LOAD-STORE UNITS (LSU); POWER MANAGEMENT; SEGMENT LOOKASIDE BUFFER (SLB); SINGLE-INSTRUCTION MULTIPLE-DATA (SIMD);

CMOS INTEGRATED CIRCUITS;

EID: 19944426768     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.838022     Document Type: Conference Paper

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