Power4 system design for high reliability

IEEE Micro

Volumn 22, Issue 2, 2002, Pages 16-24

  Bossen, Douglas C ^a   Tendler, Joel M ^a   Reick, Kevin ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MEMORY; CLIENT SERVER COMPUTER SYSTEMS; CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; COMPUTER SYSTEM RECOVERY; FAULT TOLERANT COMPUTER SYSTEMS; FIRMWARE; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; MULTIPROCESSING SYSTEMS; SILICON ON INSULATOR TECHNOLOGY; UNIX;

CENTRAL PROCESSING UNIT; MEAN TIME BETWEEN FAILURE; RUNTIME DIAGNOSTICS; SYSTEM ON A CHIP;

MICROPROCESSOR CHIPS;

EID: 0036504519     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2002.997876     Document Type: Article

References (5)

1. Error-correcting codes for semiconductor memory applications: A state-of-the art review
2. Measurement and generation of error correcting codes for package failures
3. Fault-tolerance design of the IBM enterprise system/9000 type 9021 processors
4. Automated diagnostic methodology for the IBM 3081 processor complex
5. Model for transient and permanent error detection and fault-isolation coverage