Compile-time simulation for low-power optimization using SystemC

Proceedings of the IASTED International Conference on Modeling and Simulation

Volumn , Issue , 2004, Pages 78-83

  Jones, Alex ^a   Tang, Xiaoyong ^b   Banerjee, Prith ^b  

^a UNIVERSITY OF PITTSBURGH   (United States)

^b NORTHWESTERN UNIVERSITY   (United States)

Author keywords

Hardware synthesis; Low power; Optimization; SystemC

Indexed keywords

ALGORITHMS; AUTOMATION; COMPUTER HARDWARE; COMPUTER SIMULATION; INTELLECTUAL PROPERTY; LINEAR PROGRAMMING; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; OPTIMIZATION; PROGRAM COMPILERS; SUPERVISORY AND EXECUTIVE PROGRAMS;

ELECTRONIC DESIGN AUTOMATION (EDA); HARDWARE SYNTHESIS; LOW-POWER; SYSTEMC;

ELECTRIC POWER SYSTEMS;

EID: 18944408306     PISSN: 10218181     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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