Room-temperature operation of an exclusive-OR circuit using a highly doped Si single-electron transistor

Applied Physics Letters

Volumn 86, Issue 12, 2005, Pages 1-3

  Kitade, Tetsuya ^a   Ohkura, Kensaku ^a   Nakajima, Anri ^a  

^a HIROSHIMA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COULOMB BLOCKADE; ELECTRONS; HETEROJUNCTIONS; OSCILLATIONS; SEMICONDUCTOR DOPING; TEMPERATURE DISTRIBUTION; TRANSISTORS;

CIRCUIT OPERATIONS; ROOM TEMPERATURES; SINGLE-ELECTRON TRANSISTORS (SET); SUPPRESSING COTUNNELING;

SILICON;

EID: 17944369662     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.1894594     Document Type: Article

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