A 531 nW/MHz, 128×32 current-mode programmable analog vector-matrix multiplier with over two decades of linearity

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2004, Pages 651-654

  Chawla, Ravi ^a   Bandyopadhyay, Abhishek ^a   Srinivasan, Venkatesh ^a   Hasler, Paul ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG MULTIPLICATION; FLOATING-GATE TRANSISTORS; LOGARITHMIC COMPACTION; VECTOR-MATRIX MULTIPLIERS (VMM);

COSINE TRANSFORMS; DECODING; ELECTRIC POTENTIAL; FIR FILTERS; INTEGRATED CIRCUITS; MATRIX ALGEBRA; TRANSISTORS; VECTORS;

MULTIPLYING CIRCUITS;

EID: 17044381727     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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