Generalized early evaluation in self-timed circuits

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2002, Pages 255-259

  Thornton, M A ^a   Fazel, K ^a   Reese, R B ^a   Traver, C ^b  

^a MISSISSIPPI STATE UNIVERSITY   (United States)

^b UNION COLLEGE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ASYNCHRONOUS CIRCUITS; BENCHMARK CIRCUIT; DESIGN STYLES; EARLY EVALUATION; GENERAL METHOD; GLOBAL CLOCKS; SELF-TIMED CIRCUITRY; SELF-TIMED CIRCUITS;

DESIGN; EXHIBITIONS;

ASYNCHRONOUS SEQUENTIAL LOGIC;

EID: 16444383993     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2002.998281     Document Type: Conference Paper

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