An analytical equation for the oscillation frequency of high-frequency ring oscillators

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 3, 2004, Pages 533-537

  Docking, Stephen ^a   Sachdev, Manoj ^a  

^a UNIVERSITY OF WATERLOO   (Canada)

Author keywords

Equations; High speed integrated circuits; Ring oscillators; Voltage controlled oscillators

Indexed keywords

CIRCUIT OSCILLATIONS; COMPUTER SIMULATION; ELECTRIC RESISTANCE; FREQUENCIES; GATES (TRANSISTOR); INTEGRATED CIRCUITS;

HIGH FREQUENCY RING OSCILLATORS; HIGH SPEED INTEGRATED CIRCUITS; OSCILLATION FREQUENCY;

VARIABLE FREQUENCY OSCILLATORS;

EID: 1542710439     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2003.822778     Document Type: Article

References (15)

1. M. Thamsirianunt and T. A. Kwasniewski, "CMOS VCO's for PLL frequency synthesis in GHz digital mobile radio communications," IEEE J. Solid-State Circuits, vol. 32, pp. 1511-1524, Oct. 1997.
2. C. K. K. Yang, R. Farjad-Rad, and M. A. Horowitz, "A 0.5-μm CMOS 4.0-Gbit/s serial link transceiver with data recovery using oversampling," IEEE J. Solid-State Circuits, vol. 33, pp. 713-722, May 1998.
3. L. Wu, H. Chen, S. Nagavarapu, R. Geiger, E. Lee, and W. Black, "A monolithic 1.25 Gbits/sec CMOS clock/data recovery circuit for fiber channel transceiver," in Proc. IEEE Int. Symp. Circuits and Systems, vol. 2, 1999, pp. 565-568.
4. S. B. Anand and B. Razavi, "A CMOS clock recovery circuit for 2.5-Gb/s NRZ data," IEEE J. Solid-State Circuits, vol. 36, pp. 432-439, Mar. 2001.
5. C. H. Park, O. Kim, and B. Kim, "A 1.8-GHz self-calibrated phase-locked loop with precise I/Q matching," IEEE J. Solid-State Circuits, vol. 36, pp. 777-783, May 2001.
6. L. Sun and T. A. Kwasniewski, "A 1.25-GHz 0.35-μm monolithic CMOS PLL based on a multiphase ring oscillator," IEEE J. Solid-State Circuits, vol. 36, pp. 910-916, June 2001.
7. J. Savoj and B. Razavi, "A 10-Gpbs CMOS clock and data recovery circuit with a half-rate linear phase detector," IEEE J. Solid-State Circuits, vol. 36, pp. 761-767 May 2001.
8. S. Docking and M. Sachdev, "A method to derive an equation for the oscillation frequency of a ring oscillator," IEEE Trans. Circuits Syst. I, vol. 50, pp. 259-264, Feb. 2003.
9. M. Alioto and G. Palumbo, "Oscillation frequency in CML and ESCL ring oscillators," IEEE Trans. Circuits Syst. I, vol. 48, pp. 210-214, Feb. 2001.
10. T. Weigandt, "Low-phase-noise, low-timing-jitter design techniques for delay cell based VCO's and frequency synthesizers," Ph.D., Univ. California, Berkeley, 1998.
11. B. Leung, VLSI for Wireless Communication. Upper Saddle River, NJ: Prentice-Hall, 2002.
12. J. M. Rabaey, Digital Integrated Circuits. Upper Saddle River, NJ: Prentice-Hall, 1996, p. 50.
13. J. Ou, X. Jin, I. Ma, C. Hu, and P. R. Gray, "CMOS RF modeling for GHz communication IC's," in VLSI Technology Symp. Dig. Tech. Papers, June 1998, pp. 94-95.
14. D. R. Pelke et al., "High frequency application of MOS compact model and their development for scalable RF model libraries," in Proc. Custom Integrated Circuits Conf., May 1998, pp. 219-222.
15. C. Enz and Y. Cheng, "MOS transistor modeling for RF IC design," IEEE J. Solid-State Circuits, vol. 35, pp. 186-201, Feb. 2000.