Virtual memory: Issues of implementation

Computer

Volumn 31, Issue 6, 1998, Pages 33-43

  Jacob, Bruce ^a,b,c,g   Mudge, Trevor ^b,d,e,f,h  

^a UNIVERSITY OF MARYLAND   (United States)

^b UNIVERSITY OF MICHIGAN   (United States)

^c University of Maryland ^*  (United States)

^d University of Michigan   (United States)

^e UNIVERSITY OF READING   (United Kingdom)

^f UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^g UNIVERSITY OF MARYLAND   (United States)

^h UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER ARCHITECTURE; COMPUTER OPERATING SYSTEMS; COMPUTER SYSTEMS PROGRAMMING; INTERFACES (COMPUTER); PROGRAM PROCESSORS; STORAGE ALLOCATION (COMPUTER);

SYSTEM LEVEL SOFTWARE;

VIRTUAL STORAGE;

EID: 0032095071     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/2.683005     Document Type: Article

References (11)

1. T. Kilburn et al., "One-Level Storage System," IRE Trans., Apr. 1962, pp. 223-235.
2. E. I. Organick, The Multics System: An Examination of Its Structure, MIT Press, Cambridge, Mass., 1972.
3. R. Rashid et al., "Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures," IEEE Trans. Computers, Aug. 1988, pp. 896-908.
4. H. Custer, Inside Windows NT, Microsoft Press, Redmond, Wash., 1993.
5. C. Chao, M. Mackey, and B. Sears, "Mach on a Virtually Addressed Cache Architecture," Proc. Mach Workshop, Usenix Assoc., Berkeley, Calif., Oct. 1990, pp. 31-51.
6. B.L. Jacob and T.N. Mudge, "Virtual Memory in Contemporary Microprocessors," IEEE Micro, Aug. 1998, to appear.
7. A. Silberschatz and P.B. Galvin, Operating Systems Concepts, 5th ed., Addison-Wesley, Reading, Mass., 1998.
8. H.G. Cragon, Memory Systems and Pipelined Processors, Jones and Bartlett, Sudbury, Mass., 1996.
9. D. Nagle et al., "Design Trade-Offs for Software-Managed TLBs," ACM Trans. Computer Systems, Aug, 1994,pp. 175-205.
10. J. Huck and J. Hays, "Architectural Support for Translation Table Management in Large Address Space Machines," Proc. 20th Int'l Symp. Computer Architecture (ISCA-20), IEEE CS Press, Los Alamitos, Calif., May 1993, pp. 39-50.
11. B.L. Jacob and T.N. Mudge, "Software-Managed Address Translation," Proc. Third Int'l Symp. High Performance Computer Architecture (HPCA-3), IEEE CS Press, Los Alamitos, Calif., Feb. 1997, pp. 156-167; http://www. computer.org/conferen/hpca97/77640156.pdf.