Characterization and Isolation Techniques in Silicon on Insulator Technology Microprocessor Designs

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn , Issue , 2000, Pages 327-330

  Kane, T ^a   Cambra, M ^a   Tenney, M ^a   McGinnis, P ^a   Domenicucci, A ^a   Wang, Y ^a   Falcon, D ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ATOMIC FORCE MICROSCOPY; CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRON ENERGY LOSS SPECTROSCOPY; GALLIUM; ION BEAMS; MICROPROCESSOR CHIPS; MOSFET DEVICES; SCANNING ELECTRON MICROSCOPY; TRANSMISSION ELECTRON MICROSCOPY;

JUNCTION CAPACITANCE; SCANNING CAPACITANCE MICROSCOPY;

SILICON ON INSULATOR TECHNOLOGY;

EID: 1542330751     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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3. T. Fuse, et. al., "0.5V SOI CMOS Pass-Gate Logic", '96' IEEE International Solid State Circuits Conference, pp. 88-89 (1996).
4. C. Chuang, et. al., "SOI for Digital CMOS VLSI", Proceedings of IEEE, vol. 86, no.4, pp. 689-720 (1998).
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6. Integrated Circuit Engineering, "IBM I Star, First Production SOI Microprocessor", Report Number SCA 0005-656, June 2000.
7. S.B. Herschbein, L.S. Fischer, T. Kane, M. Tenney, A. Shore, "The Challenges of FIB Chip Repair and Debug Assistance in the 0.25 μm Copper Interconnect Millenium", '98' ISTFA Proceedings, pp. 127-130 (1998).
8. K. Krieg, Richard Qi, Douglas Thomson, Greg Bridges, "Electrical Probing and Deep Sub-Micron Integrated Circuits", '99' ISTFA Proceedings, pp. 39-45 (1999).