0.5V SOI CMOS pass-gate logic

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 39, Issue , 1996, Pages 88-89

  Fuse, Tsuneaki ^a   Oowaki, Yukihito ^a   Terauchi, Mamoru ^a   Watanabe, Shigeyosh ^a   Yoshimi, Makoto ^a   Ohuchi, Kazunori ^a   Matsunaga, Jun'ichi ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; BUFFER CIRCUITS; CMOS INTEGRATED CIRCUITS; DELAY CIRCUITS; ELECTRIC LOSSES; GATES (TRANSISTOR); LOGIC GATES; MOSFET DEVICES; MULTIPLYING CIRCUITS; SILICON ON INSULATOR TECHNOLOGY;

PASS GATE LOGIC; THRESHOLD VOLTAGE; WALLACE TREE ADDER;

LOGIC CIRCUITS;

EID: 0030087134     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)