Characterization and Fault Identification of Copper BEOL Sub 0.25μm Six Level Metal Microprocessor Designs

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn , Issue , 1999, Pages 335-341

  Kane, T ^a   DeVries, K ^a   Tenney, M ^a   Patel, A ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

FAULT IDENTIFICATION; FOCUSED ION BEAM (FIB) SYSTEMS; LIGHT INDUCED VOLTAGE ALTERATION (LIVA);

CMOS INTEGRATED CIRCUITS; COPPER; ELECTROPLATING; FLIP CHIP DEVICES; PRODUCT DESIGN; REDUCED INSTRUCTION SET COMPUTING; SCANNING ELECTRON MICROSCOPY; TRANSCONDUCTANCE; TRANSMISSION ELECTRON MICROSCOPY;

MICROPROCESSOR CHIPS;

EID: 1542300924     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

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3. J.A. Kash, J.C. Tsang, D.R. Knebel, "Non-Invasive Backside Failure Analysis of Integrated Circuits by Time-Dependent Light Emission: Picosecond Imaging Circuit Analysis," 1998 ISTFA Proceedings, page 483
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5. T.Bartenstein and G. Vandling, "Fault Model Extension for Diagnosing Custom Cell Fails," International Test Conference, 1997, p.617-624
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7. S.B. Herschbein, L.S. Fischer, T.L. Kane, M.P. Tenney, A.D. Shore, "The Challenges of FIB Chip Repair and Debug Assistance in the 0.25| m Copper Interconnect Millenium," 1998 ISTFA Proceedings, page 127.